Silicon and the Buildout

Are semiconductor earnings grounded in the datacenter capacity actually being built?

The Artificial Intelligence infrastructure cycle has already generated extraordinary growth across semiconductors, memory, networking and datacenter equipment.

The next question is whether the earnings estimates attached to that growth can be reconciled with the physical infrastructure that is actually being built.

In Silicon and the Buildout, LFG+ZEST examines ten companies across the semiconductor supply chain and tests current consensus expectations against announced capital expenditure, management disclosures, physical datacenter capacity and each company's own historical profitability. The analysis begins with a simple observation: approximately 88% of the equipment cost of a next-generation AI datacenter is semiconductor and IT content. But semiconductor revenue and physical AI capacity are no longer moving at the same speed. As rack power density increases, each gigawatt can support progressively fewer racks. NVIDIA's revenue opportunity per gigawatt has risen sharply across successive platform generations, but part of that growth comes from the company absorbing an increasing share of the datacenter stack — CPUs, networking, data-processing units and other infrastructure that previously sat outside the accelerator.

Its share of IT spending has already increased from approximately 72% to 88%. This creates a natural limit to one of the principal sources of growth: share capture cannot continue indefinitely. The physical buildout provides the first important cross-check. When publicly announced capital expenditure is converted into the gigawatts it can support, the model finds that 2026 semiconductor expectations are broadly covered by committed spending. The picture becomes more demanding in the outer years.

For 2027 and 2028, consensus implies approximately $987 billion and $1.17 trillion of industry capital expenditure, respectively, compared with roughly $881 billion and $1.02 trillion currently announced. The resulting gap — around 12–15% — is meaningful, but remains small enough to be closed through further upward revisions to hyperscaler capital expenditure plans. It is therefore a variable to monitor rather than, by itself, evidence that current estimates are unsustainable.

The more striking findings appear in memory. Micron's most recent disclosure shows how little of the current revenue acceleration is being generated by additional volume. Fiscal third-quarter revenue rose approximately 74% sequentially while bit shipments increased by only around 4%.

The overwhelming majority of the improvement came from pricing. This makes current memory estimates fundamentally different from accelerator estimates: they are, to a large extent, forecasts of sustained pricing power.  The supply response is also delayed. Most announced memory fabs do not contribute meaningful output until 2028 or later. In the meantime, growing demand for high-bandwidth memory further constrains conventional DRAM because HBM consumes substantially more wafer capacity per unit of output.

The result is an unusually tight market through 2027. Consumer demand has already responded. Memory now represents a significantly larger share of the bill of materials for smartphones and PCs. Higher component costs have translated into higher device prices and lower shipments, producing one of the sharpest contractions in consumer electronics demand in more than a decade. Yet memory prices have continued to rise. The reason is that consumer demand is not currently setting the clearing price. AI buyers are.

This shifts the critical window to 2028–2029, when three forces begin to converge: new fabrication capacity arrives, AI bit-demand growth starts to decelerate, and the consumer segment enters the correction from a structurally smaller base. The margin analysis supports the same conclusion. Relative to their own 2011–2022 history, memory suppliers are earning dramatically above normal levels. Micron's 2028 consensus EBITDA margin is approximately 51 percentage points above its historical median, compared with just eight points for TSMC. The gradient is counterintuitive: the largest excess profitability appears not where structural market power is strongest, but where the shortage is most severe.

That is characteristic of a cycle. Yet over-earning does not automatically imply mispricing. Micron already trades at a low forward earnings multiple. Even after a substantial normalization in profits, its implied valuation moves toward an ordinary mid-cycle multiple. Other companies appear more demanding once current earnings are normalized. The distinction matters: identifying the part of the supply chain earning above normal levels is not the same as identifying where market prices most underestimate the risk. The broader conclusion is therefore not a bearish call on semiconductors. The current physical buildout supports more of the earnings trajectory than a simple comparison with historical margins might suggest. But the drivers are changing. Memory carries the clearest normalization risk. Accelerator growth increasingly depends on rising silicon content per gigawatt rather than rapid growth in physical capacity. And the economics of increasingly expensive platforms create a growing burden for the specialist operators financing them.

The most useful variable to monitor may therefore be neither semiconductor revenue nor headline AI capex. It is gigawatts: how much physical datacenter capacity is actually coming online, and how much semiconductor content each gigawatt can economically sustain.

The video above presents the main findings of the analysis. The complete 41-page research report, including the underlying assumptions, company-level analysis and supporting model, is available for readers who wish to go deeper.

Contact us directly to request a copy. This material is provided for informational and research purposes only and does not constitute investment advice, a recommendation, an offer or a solicitation.